1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly to a structure favorable to a power semiconductor device.
2. Description of the Background Art
<The First Conventional Art>
Case-type semiconductor devices have been conventionally known. In the case-type semiconductor device, a semiconductor chip (for example, a pair of an IGBT (Insulated Gate Bipolar Transistor) and a diode) and the like are accommodated in a package constituted of a Cu base plate and a case. More specifically, this type semiconductor device has an insulating substrate (which is formed of an insulating plate-like member (aluminum nitride, silicon nitride, alumina, or the like) with metal layers formed on both surfaces thereof), and a semiconductor chip and an electrode are soldered on the metal layer (forming a wiring pattern) formed on one surface of the insulating substrate. The metal layer formed on the other surface of the insulating substrate is soldered onto the Cu base plate. After that, the semiconductor chip and the like are electrically connected with a connecting wire such as an aluminum wire or the like. Then, the base plate and the case are bonded to each other by an adhesive. A resin (e.g., a silicone gel or a liquid epoxy resin) is injected into the package constituted of the Cu base plate and the case, and this seals the semiconductor chip and the like. After that, an electrode to be connected to the electrode inside the case is formed outside the case.
In such a structure, in a cooling process after soldering the insulating substrate onto the Cu base plate, the Cu base plate and the insulating substrate contract. The contraction due to cooling is referred to as cooling contraction. In a room temperature, with the cooling contraction, the insulating substrate warps convexly toward a side opposite to the Cu base plate and a tensile stress is exerted on an upper side (in other words, a side on which the semiconductor chip and the like are mounted) of the insulating substrate. This is because the coefficient of linear expansion of the Cu base plate is larger than that of the insulating substrate. Specifically, the coefficient of linear expansion of Cu is 17 ppm/° C. while the coefficient of linear expansion of aluminum nitride which is an exemplary material of the insulating plate-like member of which the insulating substrate is formed is 5.7 ppm/° C. The coefficient of linear expansion of silicon nitride which is another exemplary material of the insulating plate-like member is 3.2 ppm/° C. and that of alumina which is still another exemplary material of the insulating plate-like member is 6.5 ppm/° C. The amount of warp increases as the sizes of the insulating substrate and the Cu base plate become larger, and a crack occurs in the insulating substrate depending on circumstances.
Further, when the semiconductor chip generates heat due to energization, a crack sometimes occurs in a junction portion between the semiconductor chip and the connecting wire due to the difference in the coefficient of linear expansion between the semiconductor chip and the connecting wire. The occurrence of the crack degrades the reliability of the junction portion, in other words, the reliability of the semiconductor device. In order to increase the reliability of the junction portion, a complicated structure such as a stress buffer layer or the like may be introduced. The complication of the structure, however, does not meet the recent requirement for downsizing of the semiconductor device by reducing the area of the semiconductor chip.
<The Second Conventional Art>
The reliability of the junction portion between the semiconductor chip and the connecting wire can be improved by a transfer mold type semiconductor device. In this type semiconductor device, by using a resin having a coefficient of linear expansion lower than that of the liquid epoxy resin or the like used for the above-discussed case type semiconductor device, the semiconductor chip and the like are sealed by a transfer mold resin sealing method. With the transfer mold type, great adhesive strength can be achieved for components such as the semiconductor chip and the like.
In a semiconductor device disclosed in Japanese Patent Application Laid Open Gazette No. 9-129822, for example, a semiconductor chip is soldered onto one surface of a lead frame and an insulating substrate is soldered onto the other surface of the lead frame. After that, the semiconductor chip and the like are sealed with a transfer mold resin by the transfer mold method.
As the semiconductor device is upsized, however, the insulating substrate sometimes becomes liable to warp due to the curing contraction and the cooling contraction of the transfer mold resin. When a crack occurs in the insulating substrate due to the warp, the insulation of the semiconductor device cannot be ensured depending on circumstances.
Further, in the transfer mold type, an outer lead portion of the lead frame serves as a terminal of the device. Since the outer lead portion protrudes from a side surface of the semiconductor device, the semiconductor device is not easy to substitute for an already-existing product.
<The Third Conventional Art>
There is a case where high thermal conductive grease is applied to a package on which a power semiconductor device is mounted, and the power semiconductor device is mounted on the package and screwed thereinto. The thermal conductivity of the high thermal conductive grease is relatively higher than those of any other greases but is incommensurably lower those of metals. For this reason, when the high thermal conductive grease is thick, sufficient heat dissipation of the power semiconductor device cannot be achieved.
The thickness of the applied grease is determined in consideration of warp, waviness, and the like of opposed surfaces of the package and the semiconductor device. The thickness of the grease after the semiconductor device is mounted is also more than the sum of the warp and the waviness of the opposed surfaces of the package and the semiconductor device. In view of this point, various structures have been proposed to reduce the warp of the semiconductor device.
Further, when the warp, the waviness, and the like of the opposed surfaces of the package and the semiconductor device are too much larger, the semiconductor device warps when the semiconductor device is screwed into the package, and a crack sometimes occurs in the insulating substrate due to the warp. Also in order to solve the problem, various structures have been proposed.
In a structure disclosed in Japanese Patent Application Laid Open Gazette No. 2004-319992, for example, a base plate of each of partial modules has a recessed portion in a corner region thereof, and the partial modules are adjacently arranged so that the recessed portions may be confronted with each other. Then, a screw is threaded in a long hole formed by the confronted recessed portions, to thereby fix the partial modules to the package. With this structure, it is thought that the mounting area of each of the partial modules decreases and this suppresses the influence of the warp and the waviness. Since the adjacent partial modules share the screw, it is thought that it is possible to reduce the number of screws to be used. By sharing the screws, the number of portioned to be screwed, which is needed to fix n partial modules, is (2n+2).
Since the adjacent partial modules are fixed with the same screw, however, different axial forces are exerted on the partial modules even with the same amount of thread tightening, depending on the warp, the waviness, and the like of the partial modules and the warp, the waviness, and the like of the package on which the partial modules are mounted. In such a case, all the partial modules cannot be appropriately mounted.